Before we delve into testable design, we must understand how tests are generated. The goal of a test is to apply specific input vectors to a circuit and observe the outputs.
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The difficulty of testing any digital system can be distilled into two metrics: controllability (how easily a specific internal node can be set to a desired logic state) and observability (how easily the state of that node can be propagated to a primary output). In a complex sequential circuit, internal state registers act as both barriers and black holes. To test a deep logic path, a tester must sequence the chip through a long chain of clock cycles, a process that is time-consuming and error-prone. digital systems testing and testable design solution
The fundamental dilemma is that normal functional operation and testing mode have contradictory requirements. Functionality seeks to minimise pins, hide internal states, and optimise speed. Testing seeks maximum access, full visibility, and deterministic control. Before we delve into testable design, we must